EPF10K30EQC208-3N

Product Summary

The EPF10K30EQC208-3N is an Embedded Programmable Logic Device. It contains an embedded array and a logic array. The embedded array of the EPF10K30EQC208-3N is used to implement a variety of memory functions or complex logic functions, such as digital signal processing (DSP), wide data-path manipulation, microcontroller applications, and datatransformation functions. The logic array performs the same function as the sea-of-gates in the gate array and is used to implement general logic such as counters, adders, state machines, and multiplexers. The combination of embedded and logic arrays provides the high performance and high density of embedded gate arrays, enabling designers to implement an entire system on a single device. FLEX 10KE devices are configured at system power-up with data stored in an Altera serial configuration device or provided by a system controller. Altera of the EPF10K30EQC208-3N offers the EPC1, EPC2, and EPC16 configuration devices, which configure FLEX 10KE devices via a serial data stream. Configuration data can also be downloaded from system RAM or via the Altera BitBlasterTM, ByteBlasterMVTM, or MasterBlaster download cables. After a FLEX 10KE device has been configured, it can be reconfigured in-circuit by resetting the device and loading new data. Because reconfiguration of the EPF10K30EQC208-3N requires less than 85 ms, real-time changes can be made during system operation.

Parametrics

EPF10K30EQC208-3N absolute maximum ratings: (1)VCCINT Supply voltage With respect to ground: –0.5~3.6 V; (2)VCCIO: –0.5~4.6 V; (3)VI DC input voltage: –2.0~5.75 V; (4)IOUT DC output current, per pin: –25~25 mA; (5)TSTG Storage temperature No bias: –65~150 ℃; (6)TAMB Ambient temperature Under bias: –65 135 ℃; (7)TJ Junction temperature PQFP, TQFP, BGA, and FineLine BGA packages, under bias:135 ℃; (8)Ceramic PGA packages, under bias 150 ℃.

Features

EPF10K30EQC208-3N features: (1)Embedded programmable logic devices (PLDs), providing system-on-a-programmable-chip (SOPC) integration in a single device; (2)High density; (3)System-level features.

Diagrams